The present invention generally relates to electric antifuses and, more particularly, to individually programming antifuse elements to prevent inconsistent programming resistance.
Antifuse structures and associated circuitry suitable for use in integrated circuits are generally incorporated in nonvolatile memory devices or used for electrically programmable repair techniques for a dynamic random access memory (DRAM) using a redundant memory capacity. Specifically, through the addition of special test modes, it is possible to implement the device""s functionality without any alteration of the existing product pin-out specifications.
A basic antifuse element is generally a resistive fuse component, which has a very high resistance (e.g.,  greater than 100M ohm) in its initial unprogrammed state and, after an appropriate programming operation, will have a significantly lower resistance (e.g.,  less than 10 K ohm). The antifuse element is typically composed of a very thin dielectric material such as silicon dioxide, silicon nitride, tantalum oxide or a sandwich combination of dielectrics such as an ONO (silicon dioxide-silicon nitride-silicon dioxide) structure between two conductors. The antifuse is programmed by applying an appropriate programming voltage under sufficient current flow through terminals of the antifuse for a sufficient time to cause the resistance of the antifuse to permanently change from high to low.
FIG. 1 depicts conventional singular antifuse structure 14 which is constructed with the individual fingers (antifuse elements) 14A, 14B, 14C and 14D connected in parallel to a high voltage programming source HV. The fingered antifuse elements are formed on a substrate 10, and contacts 12 are placed in the substrate 10 between the antifuse elements 14A, 14B, 14C and 14D. FIG. 1 shows a single programming filament 16 formed near the edge of the antifuse element 14C.
In this parallel antifuse programming scheme, the individual fingers 14A, 14B, 14C and 14D are very often programmed with very high programmed resistance values. Under identical conditions, one antifuse element may have a post-programming resistance of 100 k Ohms (or greater) and an adjacent element may have a post-programming resistance of 50 k Ohms (or less). This depends partially on the defect density in the antifuse elements.
Such inconsistent programming resistances makes it difficult to set an effective fuse latch trip point, to distinguish a programmed fuse from an unprogrammed fuse. If an effective fuse latch trip point is set too high, the latch may have soft error reliability problems. If an effective fuse latch trip point is set too low, the latch may have little margin to read a programmed fuse correctly. Accordingly, there is a need for an improved and accurate antifuse programming scheme.
It is therefore an object of the present invention is to provide an improved antifuse structure and programming method which significantly reduces inconsistent programming resistance values among a plurality of antifuse elements.
Another object of the present invention is to provide an improved antifuse programming scheme which facilitates setting the effective fuse latch trip point of a fuse latch.
Another object of the present invention is to provide an improved antifuse programming/reading scheme, in which a plurality of antifuse elements are sequentially programmed and simultaneously read.
According to the present invention, the foregoing and other objects and advantages are achieved in part by an antifuse structure comprising a first node providing a first voltage, a plurality of antifuse elements, and a plurality of first switches. The plurality of antifuse elements are commonly connected to the first node. The plurality of first switches are sequentially activated during a program mode to individually apply the first voltage to each antifuse element. The antifuse structure may also include a second node to which a second voltage is provided. Each of the plurality of first switches may be coupled between the second node and a corresponding one of the plurality of antifuse elements. The antifuse structure may also include a third node to which a fuse latch is connected. A plurality of second switches may be coupled between the third node and a corresponding one of the plurality antifuse elements. The plurality of second switches may be simultaneously activated during a read mode.
In operation, while the first voltage is commonly applied to each of said plurality of antifuse elements, the plurality of first switches are sequentially activated to individually program each antifuse element during the program mode.